1. Field of the Invention
This invention relates to a process for making a compact multilayer circuit interconnect system.
2. Prior Art
One example of a conventional process for making a multilayer circuit interconnect system includes forming holes in a nonconductive substrate and then building up the holes by an electroless plating technique. An alternative process includes filling the holes formed in the substrate with a swage tube. Electrical components received by the holes are electrically interconnected with conductive layers on opposite sides of the substrate through a plated hole or a swage tube. Another conventional process includes filling the holes formed in the nonconductive substrate with "balls" of conductive material (e.g. solder) and heating or pressing the balls to interconnect conductive layers of the circuit pattern. Yet another conventional multilayer circuit interconnect process includes physically jumping together conductive layers on opposite sides of the nonconductive substrate.
However, these conventional processes for forming a multilayer interconnect system consume relatively large amounts of areas on a nonconductive substrae, such as a printed circuit board, a flexible film and the like. As a consequence of the relatively large areas consumed, an interconnect system formed in accordance with any of the conventional processes is unsuitable when employed with circuit patterns having closely meshed, high density conductor lines.